From 8b5982a7bfc83eb40502f92410104ac963d8d820 Mon Sep 17 00:00:00 2001 From: Jiri Kastner <cz172638@gmail.com> Date: Mon, 10 Feb 2025 19:17:33 +0100 Subject: [PATCH 1/3] config: enable endpoint in cadence pcie controllers Signed-off-by: Jiri Kastner <cz172638@gmail.com> --- patches/defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/patches/defconfig b/patches/defconfig index bb301827..126469ed 100644 --- a/patches/defconfig +++ b/patches/defconfig @@ -2022,9 +2022,12 @@ CONFIG_PCI_HOST_GENERIC=y # CONFIG_PCIE_CADENCE=y CONFIG_PCIE_CADENCE_HOST=y +CONFIG_PCIE_CADENCE_EP=y # CONFIG_PCIE_CADENCE_PLAT_HOST is not set +# CONFIG_PCIE_CADENCE_PLAT_EP is not set CONFIG_PCI_J721E=y CONFIG_PCI_J721E_HOST=y +CONFIG_PCI_J721E_EP=y # end of Cadence-based PCIe controllers # -- GitLab From 6c27f5ba4d8fa146d44d24681f4cb4d209a24100 Mon Sep 17 00:00:00 2001 From: Jiri Kastner <cz172638@gmail.com> Date: Mon, 10 Feb 2025 19:18:09 +0100 Subject: [PATCH 2/3] config: enable endpoint in designware pcie controllers Signed-off-by: Jiri Kastner <cz172638@gmail.com> --- patches/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/patches/defconfig b/patches/defconfig index 126469ed..3926f54f 100644 --- a/patches/defconfig +++ b/patches/defconfig @@ -2040,8 +2040,10 @@ CONFIG_PCIE_DW_HOST=y # CONFIG_PCI_HISI is not set # CONFIG_PCIE_KIRIN is not set # CONFIG_PCIE_DW_PLAT_HOST is not set +# CONFIG_PCIE_DW_PLAT_EP is not set CONFIG_PCI_KEYSTONE=y CONFIG_PCI_KEYSTONE_HOST=y +CONFIG_PCI_KEYSTONE_EP=y # end of DesignWare-based PCIe controllers # -- GitLab From 4c4a8137e921d9594bfab8a82ed4fb3c90995b7a Mon Sep 17 00:00:00 2001 From: Jiri Kastner <cz172638@gmail.com> Date: Mon, 10 Feb 2025 20:24:58 +0100 Subject: [PATCH 3/3] config: enable pcie endpoint Signed-off-by: Jiri Kastner <cz172638@gmail.com> --- patches/defconfig | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/patches/defconfig b/patches/defconfig index 3926f54f..32f73615 100644 --- a/patches/defconfig +++ b/patches/defconfig @@ -2062,6 +2062,12 @@ CONFIG_PCI_KEYSTONE_EP=y # PCI Endpoint # # CONFIG_PCI_ENDPOINT is not set +CONFIG_PCI_ENDPOINT=y +CONFIG_PCI_ENDPOINT_CONFIGFS=y +CONFIG_PCI_EPF_TEST=m +CONFIG_PCI_EPF_NTB=m +CONFIG_PCI_EPF_VNTB=m +CONFIG_PCI_EPF_MHI=m # end of PCI Endpoint # @@ -2476,7 +2482,7 @@ CONFIG_DS1682=m CONFIG_SRAM=y CONFIG_SRAM_DMA_HEAP=y # CONFIG_DW_XDATA_PCIE is not set -# CONFIG_PCI_ENDPOINT_TEST is not set +CONFIG_PCI_ENDPOINT_TEST=m # CONFIG_XILINX_SDFEC is not set CONFIG_MISC_RTSX=m # CONFIG_HISI_HIKEY_USB is not set -- GitLab