From 3a86181b04e715db6078ed0660624a48a757b88d Mon Sep 17 00:00:00 2001
From: Kishon Vijay Abraham I <kishon@ti.com>
Date: Tue, 16 Feb 2021 20:14:13 +0530
Subject: [PATCH] Revert "HACK: arm64: dts: ti: k3-j7200-common-proc-board:
Disable PCIe and SERDES"
Enable PCIe and SERDES, since multi-link support is added in u-boot and
the changes adapted in both kernel and ethernet firmware.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 6 ------
1 file changed, 6 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index f4bc06708c5c7..3ac2dab2acfb3 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -379,7 +379,6 @@ &usb_serdes_mux {
&serdes_ln_ctrl {
idle-states = <SERDES0_LANE0_PCIE1_LANE0>, <SERDES0_LANE1_PCIE1_LANE1>,
<SERDES0_LANE2_QSGMII_LANE1>, <SERDES0_LANE3_IP4_UNUSED>;
- status = "disabled";
};
&usbss0 {
@@ -398,10 +397,6 @@ &dummy_cmn_refclk {
clock-frequency = <100000000>;
};
-&serdes_wiz0 {
- status = "disabled";
-};
-
&serdes0 {
serdes0_pcie_link: link@0 {
reg = <0>;
@@ -425,7 +420,6 @@ &pcie1_rc {
phys = <&serdes0_pcie_link>;
phy-names = "pcie_phy";
num-lanes = <2>;
- status = "disabled";
};
&pcie1_ep {
--
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