Reserve some portions of the MAIN domain on-chip SRAM for use by
various R5F cores on AM642 SK board. A bank (256 KB) each is reserved
from the on-chip SRAM for each R5F core. This is done through specific
child SRAM nodes in the board dts file.

The memory regions are also assigned to each R5F remoteproc node using
the sram property. The reserved SRAM banks are as follows for each core:
  Main R5FSS0 Core0 : OCSRAM1
  Main R5FSS0 Core1 : OCSRAM2
  Main R5FSS1 Core0 : OCSRAM3
  Main R5FSS1 Core1 : OCSRAM4

The addresses chosen are the same as the respective processors on the
AM64x EVM board to maintain firmware compatibility between the two boards.
Please also see commit d4175486

 ("arm64: dts: ti: k3-am642-evm:
Reserve some on-chip SRAM for R5Fs").

Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>