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Commit 89aa94b4 authored by Huang Rui's avatar Huang Rui Committed by Rafael J. Wysocki
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x86/msr: Add AMD CPPC MSR definitions


AMD CPPC (Collaborative Processor Performance Control) function uses MSR
registers to manage the performance hints. So add the MSR register macro
here.

Signed-off-by: default avatarHuang Rui <ray.huang@amd.com>
Acked-by: default avatarBorislav Petkov <bp@suse.de>
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent d341db8f
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