arm: dts: ti: dt-overlay: Add a pps overlay for am57xx idk platforms

Add a new am57xx-idk-pps.dtso that can be used to configure TIMER16
in PWM mode. This PWM signal can be used as a PPS signal when
synchronized to PTP clock. Typically this synchronization is done by a
userspace program.

Set the pwm parent as abe clk that is configured to 100MHz. This gives
a minimum sampling error of just 10ns and provide a better
synchronization technique.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

arch/arm/boot/dts/ti/Makefile

@@ -26,7 +26,8 @@ dtb-y += am57xx-evm.dtbo \
 	am57xx-idk-osd-lcd-common.dtbo \
 	dra71-evm-lcd-auo-g101evn01.0.dtbo \
 	dra71-evm-nand.dtbo \
-	dra76-evm-tfp410.dtbo
+	dra76-evm-tfp410.dtbo \
+	am57xx-idk-pps.dtbo
 
 ifneq ($(DTC),)
   DTC_PATH=$(dir $(DTC))

arch/arm/boot/dts/ti/am57xx-idk-pps.dtso

+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/dra7.h>
+
+/ {
+  fragment@101 {
+	target-path = "/";
+
+	__overlay__ {
+		pwm16: dmtimer-pwm16 {
+			compatible = "ti,omap-dmtimer-pwm";
+			#pwm-cells = <3>;
+			ti,timers = <&timer16>;
+			assigned-clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER16_CLKCTRL 24>;
+			assigned-clock-parents = <&abe_giclk_div>;
+		};
+	};
+  };
+};
+
+&dpll_abe_ck {
+	assigned-clocks = <&dpll_abe_ck>;
+	assigned-clock-rates = <50000000>;
+};