- Jun 08, 2023
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Keerthy authored
Signed-off-by:Keerthy <j-keerthy@ti.com>
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Lucas Weaver authored
Confine the memory map changes into a separate rtos-memory-map.dts which describes the common memory map for all RTOS remoteprocs. vision-apps.dtbo uses this and also disables capture and display related peripherals from Linux so that it can be used by RTOS. edgeai-apps.dtbo expects these devices to be owned by linux, so it uses the rtos-memory-map customization only. Signed-off-by:Nikhil Devshatwar <nikhil.nd@ti.com>
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- Feb 22, 2023
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Dhruva Gole authored
This region is needed for the lpm stub to load and execute full system suspend. Also disable the wkup r5fss because it lacks LPM support. Signed-off-by:Dhruva Gole <d-gole@ti.com>
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Dhruva Gole authored
Remove the "lpm" region from am62-main DT and rather have it in the lpmdemo DT since Low Power Mode is currently said to be supported only using k3-am625-sk-lpmdemo This will help fix the k3_r5_rproc: probe issues Signed-off-by: -
Dhruva Gole authored
Move the OPP Table entry for 1.4GHz from am62x-sk-common to am625-sk DT because it's not a common property across all sk variants of am62x Suggested-by:
Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by:
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- Feb 21, 2023
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The SK-Ethernet-DC01 Add-On Ethernet Card for AM62A-SK board supports RGMII mode. Add overlay to enable the second CPSW3G port in RGMII-RXID mode with the Add-On Ethernet Card. Signed-off-by:
Siddharth Vadapalli <s-vadapalli@ti.com> Signed-off-by:
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Add alias for CPSW3G MAC port 1 to enable kernel to fetch MAC Address directly from U-Boot. Signed-off-by:
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- Feb 15, 2023
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Heiner Kallweit authored
commit d182bcf3 upstream. The usage of edge-triggered interrupts lead to lost interrupts under load, see [0]. This was confirmed to be fixed by using level-triggered interrupts. The report was about SDIO. However, as the host controller is the same for SD and MMC, apply the change to all mmc controller instances. [0] https://www.spinics.net/lists/linux-mmc/msg73991.html Fixes: 221cf34b ("ARM64: dts: meson-axg: enable the eMMC controller") Reported-by:
Peter Suti <peter.suti@streamunlimited.com> Tested-by:
Vyacheslav Bocharov <adeep@lexina.in> Tested-by:
Heiner Kallweit <hkallweit1@gmail.com> Acked-by:
Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/c00655d3-02f8-6f5f-4239-ca2412420cad@gmail.com Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Heiner Kallweit authored
commit ac8db4cc upstream. The usage of edge-triggered interrupts lead to lost interrupts under load, see [0]. This was confirmed to be fixed by using level-triggered interrupts. The report was about SDIO. However, as the host controller is the same for SD and MMC, apply the change to all mmc controller instances. [0] https://www.spinics.net/lists/linux-mmc/msg73991.html Fixes: 4759fd87 ("arm64: dts: meson: g12a: add mmc nodes") Tested-by:
FUKAUMI Naoki <naoki@radxa.com> Tested-by:
Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by:
Jerome Brunet <jbrunet@baylibre.com> Cc: stable@vger.kernel.org Signed-off-by:
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Heiner Kallweit authored
commit 66e45351 upstream. The usage of edge-triggered interrupts lead to lost interrupts under load, see [0]. This was confirmed to be fixed by using level-triggered interrupts. The report was about SDIO. However, as the host controller is the same for SD and MMC, apply the change to all mmc controller instances. [0] https://www.spinics.net/lists/linux-mmc/msg73991.html Fixes: ef8d2ffe ("ARM64: dts: meson-gxbb: add MMC support") Cc: stable@vger.kernel.org Signed-off-by:
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Guo Ren authored
commit 950b879b upstream. In commit 588a513d ("arm64: Fix race condition on PG_dcache_clean in __sync_icache_dcache()"), we found RISC-V has the same issue as the previous arm64. The previous implementation didn't guarantee the correct sequence of operations, which means flush_icache_all() hasn't been called when the PG_dcache_clean was set. That would cause a risk of page synchronization. Fixes: 08f051ed ("RISC-V: Flush I$ when making a dirty page executable") Signed-off-by:
Guo Ren <guoren@linux.alibaba.com> Signed-off-by:
Guo Ren <guoren@kernel.org> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com> Reviewed-by:
Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230127035306.1819561-1-guoren@kernel.org Cc: stable@vger.kernel.org Signed-off-by:
Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by:
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Joerg Roedel authored
commit 9d2c7203 upstream. In kernels compiled with CONFIG_PARAVIRT=n, the compiler re-orders the DR7 read in exc_nmi() to happen before the call to sev_es_ist_enter(). This is problematic when running as an SEV-ES guest because in this environment the DR7 read might cause a #VC exception, and taking #VC exceptions is not safe in exc_nmi() before sev_es_ist_enter() has run. The result is stack recursion if the NMI was caused on the #VC IST stack, because a subsequent #VC exception in the NMI handler will overwrite the stack frame of the interrupted #VC handler. As there are no compiler barriers affecting the ordering of DR7 reads/writes, make the accesses to this register volatile, forbidding the compiler to re-order them. [ bp: Massage text, make them volatile too, to make sure some aggressive compiler optimization pass doesn't discard them. ] Fixes: 315562c9 ("x86/sev-es: Adjust #VC IST Stack on entering NMI handler") Reported-by:
Alexey Kardashevskiy <aik@amd.com> Signed-off-by:
Joerg Roedel <jroedel@suse.de> Signed-off-by:
Borislav Petkov (AMD) <bp@alien8.de> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20230127035616.508966-1-aik@amd.com Signed-off-by:
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Andreas Schwab authored
commit 2f394c0e upstream. GCC 13 will enable -fasynchronous-unwind-tables by default on riscv. In the kernel, we don't have any use for unwind tables yet, so disable them. More importantly, the .eh_frame section brings relocations (R_RISC_32_PCREL, R_RISCV_SET{6,8,16}, R_RISCV_SUB{6,8,16}) into modules that we are not prepared to handle. Signed-off-by:
Andreas Schwab <schwab@suse.de> Link: https://lore.kernel.org/r/mvmzg9xybqu.fsf@suse.de Cc: stable@vger.kernel.org Signed-off-by:
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Helge Deller authored
commit 316f1f42 upstream. Wire up the missing ptrace requests PTRACE_GETREGS, PTRACE_SETREGS, PTRACE_GETFPREGS and PTRACE_SETFPREGS when running 32-bit applications on 64-bit kernels. Signed-off-by:
Helge Deller <deller@gmx.de> Cc: stable@vger.kernel.org # 4.7+ Signed-off-by:
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Helge Deller authored
commit 5d1335da upstream. There is an off-by-one if the printed string includes a new-line char. Cc: stable@vger.kernel.org Signed-off-by:
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Pierluigi Passaro authored
[ Upstream commit 47123900 ] According section 8.2.5.313 Select Input Register (IOMUXC_UART1_RXD_SELECT_INPUT) of i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020 the required setting for this specific pin configuration is "1" Signed-off-by:
Pierluigi Passaro <pierluigi.p@variscite.com> Reviewed-by:
Fabio Estevam <festevam@gmail.com> Fixes: c1c9d413 ("dt-bindings: imx: Add pinctrl binding doc for imx8mm") Signed-off-by:
Shawn Guo <shawnguo@kernel.org> Signed-off-by:
Sasha Levin <sashal@kernel.org>
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Michael Ellerman authored
commit ad53db4a upstream. The recent commit 76d588dd ("powerpc/imc-pmu: Fix use of mutex in IRQs disabled section") fixed warnings (and possible deadlocks) in the IMC PMU driver by converting the locking to use spinlocks. It also converted the init-time nest_init_lock to a spinlock, even though it's not used at runtime in IRQ disabled sections or while holding other spinlocks. This leads to warnings such as: BUG: sleeping function called from invalid context at include/linux/percpu-rwsem.h:49 in_atomic(): 1, irqs_disabled(): 0, non_block: 0, pid: 1, name: swapper/0 preempt_count: 1, expected: 0 CPU: 7 PID: 1 Comm: swapper/0 Not tainted 6.2.0-rc2-14719-gf12cd06109f4-dirty #1 Hardware name: Mambo,Simulated-System POWER9 0x4e1203 opal:v6.6.6 PowerNV Call Trace: dump_stack_lvl+0x74/0xa8 (unreliable) __might_resched+0x178/0x1a0 __cpuhp_setup_state+0x64/0x1e0 init_imc_pmu+0xe48/0x1250 opal_imc_counters_probe+0x30c/0x6a0 platform_probe+0x78/0x110 really_probe+0x104/0x420 __driver_probe_device+0xb0/0x170 driver_probe_device+0x58/0x180 __driver_attach+0xd8/0x250 bus_for_each_dev+0xb4/0x140 driver_attach+0x34/0x50 bus_add_driver+0x1e8/0x2d0 driver_register+0xb4/0x1c0 __platform_driver_register+0x38/0x50 opal_imc_driver_init+0x2c/0x40 do_one_initcall+0x80/0x360 kernel_init_freeable+0x310/0x3b8 kernel_init+0x30/0x1a0 ret_from_kernel_thread+0x5c/0x64 Fix it by converting nest_init_lock back to a mutex, so that we can call sleeping functions while holding it. There is no interaction between nest_init_lock and the runtime spinlocks used by the actual PMU routines. Fixes: 76d588dd ("powerpc/imc-pmu: Fix use of mutex in IRQs disabled section") Tested-by:
Kajol <Jain<kjain@linux.ibm.com> Reviewed-by:
Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20230130014401.540543-1-mpe@ellerman.id.au Signed-off-by:
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Bhavya Kapoor authored
Remove no-1-8-v property from device tree so that SD card can work in any UHS-1 high speed modes at 1.8v. Signed-off-by:
Bhavya Kapoor <b-kapoor@ti.com> Reviewed-by:
Nitin Yadav <n-yadav@ti.com>
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Bhavya Kapoor authored
Remove sdhci-caps-mask to enable support for SDR104 speed mode for SD card in J784S4 SoC. Signed-off-by:
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- Feb 14, 2023
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The AM69 SK has PWM output pins connected to its RPi headers on J27 Connector. This overlay will set the appropriate pinmux and enable PWM on those pins. Signed-off-by:
Dasnavis Sabiya <sabiya.d@ti.com> Reviewed-by:
Rahul T R <r-ravikumar@ti.com> Signed-off-by:
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Add dts nodes for 6 EHRPWM instances on SoC Signed-off-by:
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Rev E2 of the AM68 SK baseboard now includes two more GPIO IO expanders. Add GPIO IO expander node that is required for the CSI functionality and update the camera reset-gpios property to use the same. Signed-off-by:
Sinthu Raja <sinthu.raja@ti.com> Signed-off-by:
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Rev E2 of the AM68 SK baseboard now includes two more GPIO IO expanders. Add GPIO IO expander node that is required for the CSI functionality and update the camera powerdown property to use the same. Signed-off-by:
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Rev E2 of the AM68 SK baseboard now includes two more GPIO IO expanders. To match the Rev E2 schematics, update existing IO expander GPIO line names and add one IO expander node that is required for display. Signed-off-by:
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- Feb 13, 2023
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Kamlesh Gurudasani authored
Add the address space for MCRC to the ranges property of the cbass_main node and add dt node for MCRC engine Signed-off-by:
Kamlesh Gurudasani <kamlesh@ti.com> Reviewed-by:
Roger Quadros <rogerq@kernel.org>
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- Feb 10, 2023
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Dhruva Gole authored
fixes commit c46bdeb0 ("arm64: dts: ti: k3-am625-sk-lpmdemo: Enable CSI") where a merge conflict added DSS node and deletion of CSI didn't go through. Signed-off-by:
Aradhya Bhatia <a-bhatia1@ti.com> Reviewed-by:
Jai Luthra <j-luthra@ti.com>
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- Feb 09, 2023
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The size of IO PADCONFIG register set of the wakeup domain is incorrect for J784S4. Update the PADCONFIG total offset size to the correct value for J784S4 SoC. Fixes: 30f884ec ("arm64: dts: ti: Add initial support for J784S4 SoC") Signed-off-by:
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Enable CSI-RX for AM62 low-power demo, as all drivers now support relevant suspend/resume hooks, and active streams are restored on system resume. Signed-off-by:
Vaishnav Achath <vaishnav.a@ti.com> Tested-by:
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The 4L PCIe0 is interfaced through SERDES1 on AM69 SK platform. Update the serdes_ln_ctrl node to add support for 4 lanes of PCIe0. Signed-off-by:
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The AM68 SK has PWM output pins connected to its RPi headers on J3 Connector. This overlay will set the appropriate pinmux and enable PWM on those pins. Signed-off-by:
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- Feb 08, 2023
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Vibhore Vardhan authored
This removes the hardcoded LPM carveout from the dts as the memory region is now being allocated and managed by dma_alloc_coherent(). Signed-off-by:Vibhore Vardhan <vibhore@ti.com>
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Vibhore Vardhan authored
System must load firmware to a specific location before Deep Sleep is entered and this is accomplished using "firmware-name" property to indicate the name of the firmware to load. The prefix "ti,lpm-" has been dropped based on upstream feedback. Signed-off-by:
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- Feb 07, 2023
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AM62A7-SK board has 4GB LPDDR4 Micron MT53E2G32D4DE-046 AUT:B memory but only 2GB was enabled early. Enable full 4GB memory by updating the latter 2GB memory region which gets mapped to 0x0880000000 i.e. DDR16SS0_SDRAM as referred in Table 2-1. AM62A Common SoC Memory of AM62Ax TRM. TRM : https://www.ti.com/lit/zip/spruj16 Logs: Link : https://gist.github.com/devarsht/e85b6af89c01ddadb3a62f3e5f196af8 Signed-off-by:
Devarsh Thakkar <devarsht@ti.com> Signed-off-by:
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Enable display node (DSS) on AM625-SK in Low Power Mode. Signed-off-by:
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- Feb 06, 2023
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Krzysztof Kozlowski authored
[ Upstream commit ef10d579 ] There is no "no-emmc" property, so intention for SD/SDIO only nodes was to use "no-mmc". Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
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Geert Uytterhoeven authored
[ Upstream commit 42825d1f ] "make dtbs_check": arch/arm/boot/dts/vf610-zii-dev-rev-b.dtb: tca9548@70: $nodename:0: 'tca9548@70' does not match '^(i2c-?)?mux' From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml arch/arm/boot/dts/vf610-zii-dev-rev-b.dtb: tca9548@70: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'i2c@0', 'i2c@1', 'i2c@2', 'i2c@3', 'i2c@4' were unexpected) From schema: /scratch/geert/linux/linux-renesas/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml ... Fix this by renaming PCA9548 nodes to "i2c-mux", to match the I2C bus multiplexer/switch DT bindings and the Generic Names Recommendation in the Devicetree Specification. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
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Geert Uytterhoeven authored
[ Upstream commit f78985f9 ] "make dtbs_check": arch/arm/boot/dts/imx53-ppd.dtb: i2c-switch@70: $nodename:0: 'i2c-switch@70' does not match '^(i2c-?)?mux' From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml arch/arm/boot/dts/imx53-ppd.dtb: i2c-switch@70: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'i2c@0', 'i2c@1', 'i2c@2', 'i2c@3', 'i2c@4', 'i2c@5', 'i2c@6', 'i2c@7' were unexpected) From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml Fix this by renaming the PCA9547 node to "i2c-mux", to match the I2C bus multiplexer/switch DT bindings and the Generic Names Recommendation in the Devicetree Specification. Signed-off-by:
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- Feb 03, 2023
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Devarsh Thakkar authored
The RTOS IPC memory region is bumped up to 16Mb from 3Mb and dma heap carveout is reduced by 16 Mb to 176Mb to fit overall memory map to exact 1Gb i.e from 0x80000000 to 0xBFFFFFFF. The alignment property is removed from RTOS IPC region as region being marked as no-map won't allow OS to create a virtual mapping. Tested-By:
Sai Sree Kartheek Adivi <s-adivi@ti.com> Signed-off-by:
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- Feb 02, 2023
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Add pinmux required to bring out the i2c and gpios on 40 pin RPi expansion header on am68 sk board. Signed-off-by:
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The size of wkup domain's I/O PADCONFIG register set is incorrect for J721S2. Therefore, update the PADCONFIG total offset size to the correct value for J721S22 SoC. Fixes: 022f7c5b ("arm64: dts: ti: Add initial support for J721S2 SoC") Signed-off-by:
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