- Aug 11, 2022
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Jason Kridner authoredFrom https://github.com/statropy/wpanusb
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Robert Nelson authored
Signed-off-by:Robert Nelson <robertcnelson@gmail.com>
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Robert Nelson authored
Signed-off-by: -
Robert Nelson authored
Signed-off-by: -
Robert Nelson authored
Signed-off-by: -
Robert Nelson authored
Signed-off-by: -
Lucas Weaver authored
The following has been done in this commit: 1) Add new nodes definitions for enabling all 6 EHRPWM instances 2) Add rules to disable all the instances for non SK platforms 3) Add rules to enable instances 2 and 3 for the SK platform 4) Add mux settings for enabling channel A from instances 2 and 3 for the RPi extension header on the SK platform
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Prashanth Kumar Amai authored
v4l:vxd-dec:Flushing all the IO buffers and releasing all the held buffers while joing v4l2 job_abort. This patch does the fulsh operation by releasing all the locked up buffers in the driver. It throws the v4l2 harmless traces while trying to re-release the released buffers. Signed-off-by:Prashanth Kumar Amai <prashanth.amai@ti.com>
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Sinthu Raja authored
Add DTB overlay file with pin mux details for RPi expansion header defaulting to GPIO mode Signed-off-by:Sinthu Raja <sinthu.raja@ti.com>
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Andrew F. Davis authored
This is driver allows user-space to attach a DMA-BUF and receive back its CPU physical address. This is a temporary solution to allow CMEM like functionality from allocated buffers. This is a hack and this will be removed when proper solutions are implemented. Signed-off-by:
Andrew F. Davis <afd@ti.com> Signed-off-by:
Gowtham Tammana <g-tammana@ti.com>
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Gowtham Tammana authored
Driver allowing user-space attaching of dmabuf fd's returning CPU physical addresses. The reasoning for making this act like a regular device described by DT is so the virtual device that binds the buffer can be made to act as if it is out on a bus or behind an IOMMU, for example. Add this binding here. This is a hack and marked as such. Signed-off-by: -
Keerthy authored
Signed-off-by:Keerthy <j-keerthy@ti.com>
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Lucas Weaver authored
Confine the memory map changes into a separate rtos-memory-map.dts which describes the common memory map for all RTOS remoteprocs. vision-apps.dtbo uses this and also disables capture and display related peripherals from Linux so that it can be used by RTOS. edgeai-apps.dtbo expects these devices to be owned by linux, so it uses the rtos-memory-map customization only. Signed-off-by:Nikhil Devshatwar <nikhil.nd@ti.com>
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Texas Instruments Auto Merger authored
TI-Feature: platform_base TI-Branch: platform-ti-linux-5.10.y * 'platform-ti-linux-5.10.y' of ssh://bitbucket.itg.ti.com/lcpdpublicdom/platform : misc: sram: dma-heap-export: Make our dma_buf_ops static HACK: dma-buf: heaps: carveout: Make our dma_buf_ops static HACK: dma-buf: heaps: carveout: Add support for cached carveout heaps Signed-off-by:
Texas Instruments Auto Merger <lcpd_integration@list.ti.com>
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Texas Instruments Auto Merger authored
TI-Feature: connectivity TI-Branch: connectivity-ti-linux-5.10.y * 'connectivity-ti-linux-5.10.y' of ssh://bitbucket.itg.ti.com/lcpdpublicdom/connectivity : arm64: dts: ti: Disable UHS speed modes on MMCSD1 instance dmaengine: ti: k3-udma: Reset UDMA_CHAN_RT byte counters to prevent overflow phy: ti: phy-j721e-wiz: stop name conflict if multiple serdes are initialized Signed-off-by:
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- Aug 10, 2022
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Instabilities were observed on a few SD cards when UHS speed modes were enabled. Therefore, disable UHS modes by adding the tag no-1-8-v tag, in sdhci1 device tree node. Signed-off-by:
Aswath Govindraju <a-govindraju@ti.com> Signed-off-by:
Vignesh Raghavendra <vigneshr@ti.com> Tested-by:
Bryan Brattlof <bb@ti.com>
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UDMA_CHAN_RT_*BCNT_REG stores the real-time channel bytecount statistics. These registers are 32-bit hardware counters and the driver uses these counters to monitor the operational progress status for a channel, when transferring more than 4GB of data it was observed that these counters overflow and completion calculation of a operation gets affected and the transfer hangs indefinitely. This commit adds changes to decrease the byte count for every complete transaction so that these registers never overflow and the proper byte count statistics is maintained for ongoing transaction by the RT counters. Earlier uc->bcnt used to maintain a count of the completed bytes at driver side, since the RT counters maintain the statistics of current transaction now, the maintenance of uc->bcnt is not necessary. Signed-off-by:
Vaishnav Achath <vaishnav.a@ti.com> Signed-off-by:
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When multiple serdes instances are initialized the first will succeed but additional will conflict over clocks names and probing fails. Signed-off-by:
Matt Ranostay <mranostay@ti.com> Signed-off-by:
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- Aug 05, 2022
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Andrew Davis authored
This is only used locally, mark static. Reported-by:
kernel test robot <lkp@intel.com> Signed-off-by:
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Andrew Davis authored
This is only used locally, mark static. Reported-by:
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Andrew Davis authored
Remove the "no-map" property from the carveout DT node to have kernel and userspace mappings cached. This is currently a hack as I have not yet added a good way to clean these buffers out of the CPU cache. These should only be used on io-coherent platforms such as AM65x and J7x. Signed-off-by: -
Texas Instruments Auto Merger authored
TI-Feature: connectivity TI-Branch: connectivity-ti-linux-5.10.y * 'connectivity-ti-linux-5.10.y' of ssh://bitbucket.itg.ti.com/lcpdpublicdom/connectivity : (24 commits) Input: ili210x - use one common reset implementation Input: ili210x - reduce sample period to 15ms Input: ili210x - improve polled sample spacing Input: ili210x - special case ili251x sample read out Input: ili210x - add ili251x firmware update support Input: ili210x - export ili251x version details via sysfs Input: ili210x - use resolution from ili251x firmware drm/tidss: Add support for AM625 DSS dt-bindings: display: ti,am65x-dss: Add am625 dss compatible arm64: dts: ti: k3-j7200: Add SR2.0 SERDES changes arm64: dts: ti: k3-j7200: Add SR1.0 specific DT Overlays phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink config for TI J7200 dt-bindings: phy: cadence-torrent: Add compatible for "ti,j7200-serdes-10g" phy: ti: phy-j721e-wiz: set PMA_CMN_REFCLK_DIG_DIV based on reflk rate phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink configuration phy: cadence-torrent: Add PCIe(100MHz) + USXGMII(156.25MHz) multilink configuration phy: cadence-torrent: use key:value pair table for all settings phy: ti: phy-j721e-wiz: add support for j7200-wiz-10g dt-bindings: phy: ti, phy-j721e-wiz: Add support for ti,j7200-wiz-10g dt-bindings: phy: ti, phy-j721e-wiz: deprecate clock MUX nodes ... Signed-off-by:
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- Aug 04, 2022
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Texas Instruments Auto Merger authored
TI-Feature: platform_base TI-Branch: platform-ti-linux-5.10.y * 'platform-ti-linux-5.10.y' of ssh://bitbucket.itg.ti.com/lcpdpublicdom/platform : arm64: dts: ti: k3-am625-sk: mark MCU and WKUP watchdogs as reserved arm64: dts: ti: k3-am62: add watchdog nodes Signed-off-by:
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commit b26ff913 upstream Rename ili251x_hardware_reset() to ili210x_hardware_reset(), change its parameter from struct device * to struct gpio_desc *, and use it as one single consistent reset implementation all over the driver. Also increase the minimum reset duration to 12ms, to make sure the reset is really within the spec. Signed-off-by:
Marek Vasut <marex@denx.de> Link: https://lore.kernel.org/r/20220518210423.106555-1-marex@denx.de Signed-off-by:
Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by:
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commit 27931d38 upstream Modern devices may redraw display at 60 Hz, make sure we have one input sample per one frame. Reduce sample period to 15ms, so we would get up to 66.6 samples per second, although realistically with all the jitter and extra scheduling wiggle room, we would end up just above 60 samples per second. This should be a good compromise between sampling too often and sampling too seldom. Signed-off-by:
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commit 8639e042 upstream Currently the ili210x driver implements a threaded interrupt handler which starts upon edge on the interrupt line, and then polls the touch controller for samples. Every time a sample is obtained from the controller, the thread function checks whether further polling is required, and if so, waits fixed amount of time before polling for next sample. The delay between consecutive samples can thus vary greatly, because the I2C transfer required to retrieve the sample from the controller takes different amount of time on different platforms. Furthermore, different models of the touch controllers supported by this driver require different delays during retrieval of samples too. Instead of waiting fixed amount of time before polling for next sample, determine how much time passed since the beginning of sampling cycle and then wait only the remaining amount of time within the sampling cycle. This makes the driver deliver samples with equal spacing between them. Signed-off-by:
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commit de889108 upstream The ili251x touch controller needs 5ms delay between sending I2C device address and register address, and, writing or reading register data. According to downstream ili251x example code, this 5ms delay is not required when reading touch samples out of the controller. Implement such a special case. Signed-off-by:
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commit c6ac8f0b upstream The ili251x firmware can be updated, this is used when switching between different modes of operation of the touch surface, e.g. glove operation. This patch implements the firmware update mechanism triggered by a write into an sysfs attribute. The firmware itself is distributed as an intel hex file with non-standard types. The first two lines are of type 0xad, which indicates the start of DataFlash payload, that is always at address 0xf000 on the ili251x, so it can be dropped, and 0xac which indicates the position of firmware info in the Application payload, that is always at address 0x2020 on the ili251x and we do not care. The rest of the firmware is data of type 0x00, and we care about that. To convert the firmware hex file into something usable by the kernel, remove the first two lines and then use ihex2fw: $ tail -n +3 input.hex > temp.hex $ ./tools/firmware/ihex2fw temp.hex firmware/ilitek/ili251x.bin To trigger the firmware update, place firmware file ilitek/ili251x.bin into /lib/firmware/, write into firmware_update sysfs attribute and wait about 30-40 seconds. The firmware update is slow. Afterward, verify the firmware_version and mode sysfs attributes to check whether the firmware got updated and the controller switched back to application (AP) mode by reading out 'mode' attribute in sysfs. Note that the content of firmware_version, e.g. 0600.0005.abcd.aa04 can be matched to the content of the firmware hex file. The first four bytes, 0x06 0x00 0x00 0x05 can be found at ^:102030 00 05000006, the next four bytes 0xab 0xcd 0xaa 0x04 at ^:10F000 00 nnnnnnnn ABCDAA04. Note that the protocol differs considerably between the ili2xxx devices, this patch therefore implements this functionality only for ili251x that I can test. Signed-off-by:
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commit 70a7681d upstream The ili251x firmware protocol permits readout of firmware version, protocol version, mcu version and current mode (application, boot loader, forced update). These information are useful when updating the firmware on the il251x, e.g. to avoid updating the same firmware into the device multiple times. The locking is now necessary to avoid races between interrupt handler and the sysfs readouts. Note that the protocol differs considerably between the ili2xxx devices, this patch therefore implements this functionality only for ili251x that I can test. Signed-off-by:
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commit 235300ed upstream The ili251x firmware protocol permits readout of panel resolution, implement this, but make it possible to override this value using DT bindings. This way, older DTs which contain touchscreen-size-x and touchscreen-size-y properties will behave just like before and new DTs may avoid specifying these for ILI251x. Note that the command format is different on other controllers, so this functionality is isolated to ILI251x. Signed-off-by:
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Add support for the DSS IP on TI's new AM625 SoC in the tidss driver. Signed-off-by:
Aradhya Bhatia <a-bhatia1@ti.com> Reviewed-by:
Rahul T R <r-ravikumar@ti.com> Signed-off-by:
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Add ti,am625-dss compatible string. The DSS IP on TI's AM625 SoC is an update from the DSS on TI's AM65X SoC. The former has an additional OLDI TX to enable a 2K resolution on OLDI displays or enable 2 duplicated displays with a smaller resolution. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
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- Aug 03, 2022
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Julien Panis authored
MCU wdt is typically used by M4F. Wake up wdt is typically used by DM (R5) firmware. Signed-off-by:Julien Panis <jpanis@baylibre.com>
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Julien Panis authored
Add nodes for watchdogs : - 5 in main domain - 1 in MCU domain - 1 in wakeup domain Signed-off-by:
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- Jul 31, 2022
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The SERDES in SR1.0 supports 2 reference clocks. The second reference clock (core_ref1_clk) is hardwired to MAIN_PLL3_HSDIV4_CLKOUT (100/125/156.25 MHz). DM firmware update is required to set this clock to 156.25MHz for USXGMII support. Switch the SERDES wrapper device compatible to "ti,j7200-wiz-10g" to be aware of the additional reference clock and the special SCM register to manage the configuration i.e. "ti,scm" property. Switch the SERDES device compatible to "ti,j7200-serdes-10g" to support dual reference clock configurations. The SERDES clock configuration is not changed in this patch. Both the PLL reference clocks are still set to 100MHz (core_ref_clk) i.e. MAIN_PLL2_HSDIV4_CLKOUT. Later, when USXGMII is required the respective PLL reference clock can be switched to (core_ref1_clk) i.e. 156.25MHz while leaving the other PLL at 100MHz so PCIe/SGMII can continue to work. Signed-off-by:Roger Quadros <rogerq@kernel.org> Signed-off-by: Vignesh Rag...
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SR2.0 has some differences than SR1.0. The current DT files will contain SR2.0 material and all SR1.0 specific differences will be held in these new overlay files. The usage model is same as in AM65. Silicon specific changes should be in DT overlay: k3-j7200-sr1.dts The SR1.0 specific board should include the above DT overlay file and then make any board specific changes if required. e.g.: k3-j7200-common-proc-board-sr1.dts SR2.0 specific changes in main device tree files will be added later. Signed-off-by:
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Add a separate compatible and registers map table for TI J7200. TI J7200 uses Torrent SD0805 version which is a special version derived from SD0801 that has two internal reference clocks along with one external reference clock. Add register sequences for USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink config for TI J7200. Signed-off-by:
Swapnil Jakhade <sjakhade@cadence.com> Signed-off-by:
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