- Dec 11, 2020
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Suman Anna authored
Reserve some portions of the MAIN domain on-chip SRAM for use by various R5F cores on AM642 EVM board. A bank (256 KB) each is reserved from the on-chip SRAM for each R5F core. This is done through specific child SRAM nodes in the board dts file. The memory regions are also assigned to each R5F remoteproc node using the sram property. The reserved SRAM banks are as follows for each core: Main R5FSS0 Core0 : OCSRAM1 Main R5FSS0 Core1 : OCSRAM2 Main R5FSS1 Core0 : OCSRAM3 Main R5FSS1 Core1 : OCSRAM4 Signed-off-by:
Suman Anna <s-anna@ti.com> Signed-off-by:
Ming Wei <mwei@ti.com>
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Suman Anna authored
Add aliases for all the R5F remoteproc processor cores present within the MAIN domain and common to all the K3 AM64x boards. The aliases use the stem "rproc". Note that each of the R5F1 cores and their corresponding aliases are uniquely identified and used only if the corresponding R5F cluster/subsystem is running in Split-mode. The aliases can be overridden, if needed, in the respective derivative board dts files. Signed-off-by: -
Suman Anna authored
Add a reserved memory node to reserve a portion of the DDR memory to be used for performing inter-processor communication between all the remote processors running RTOS or baremetal on the TI K3 AM642 EVM board. 8 MB of memory is reserved for this purpose, and this accounts for all the vrings and vring buffers between all the possible pairs of remote processors. NOTE: The AM64x SoCs do not have any DSPs and one less R5F cluster compared to J721E SoCs. So, while the carveout memories reserved for the R5F clusters present on the SoC match to those on J721E, the overall memory map reserved for firmwares is quite different. The number of R5F clusters on AM64x SoCs are same as on J7200 SoCs, but the AM64x SoCs also have an additional M4F core, so the RTOS IPC memory region is 1 MB higher than on J7200 SoCs. Signed-off-by: -
Suman Anna authored
Two carveout reserved memory nodes each have been added for each of the R5F remote processor devices within the MAIN domain on the TI AM642 EVM board. These nodes are assigned to the respective rproc device nodes as well. The first region will be used as the DMA pool for the rproc devices, and the second region will furnish the static carveout regions for the firmware memory. The current carveout addresses and sizes are defined statically for each device. The R5F processors do not have an MMU, and as such require the exact memory used by the firmwares to be set-aside. The firmware images do not require any RSC_CARVEOUT entries in their resource tables to allocate the memory for firmware memory segments. Note that the R5F1 carveouts are needed only if the R5F cluster is running in Split (non Single-CPU) mode. The reserved memory nodes can be disabled later on if there is no use-case defined to use the corresponding remote processor. Signed-off-by: -
Suman Anna authored
Add the required 'mboxes' property to all the R5F processors on the TI AM642 EVM board. The mailboxes and some shared memory are required for running the Remote Processor Messaging (RPMsg) stack between the host processor and each of the R5Fs. The chosen sub-mailboxes match the values used in the current firmware images. This can be changed, if needed, as per the system integration needs after making appropriate changes on the firmware side as well. Note that any R5F Core1 resources are needed and used only when that R5F cluster is configured for Split-mode. Signed-off-by: -
Suman Anna authored
The AM64x SoCs have 2 dual-core Arm Cortex-R5F processor (R5FSS) subsystems/clusters. Both the R5F clusters are present within the MAIN domain (MAIN_R5FSS0 & MAIN_R5FSS1). Each of these can be configured at boot time to be either run in a new "Single-CPU" mode or in an Asymmetric Multi Processing (AMP) fashion in Split-mode. The mode is restricted to "Single-CPU" on some devices with the appropriate eFuse bit set, but the most common devices support both modes. These subsystems have 64 KB each Tightly-Coupled Memory (TCM) internal memories for each core split between two banks - ATCM and BTCM (further interleaved into two banks). The TCMs of both Cores are combined in Single-CPU mode to provide a larger 128 KB of memory. The other notable difference is that the TCMs are spaced 1 MB apart on these SoCs unlike the existing SoCs. Add the DT nodes for these two MAIN domain R5F cluster/subsystems, the two R5F cores are each added as child nodes to the corresponding main cluster node. Both the clusters are configured to run in Split mode by default, with the ATCMs enabled to allow the R5 cores to execute code from DDR with boot-strapping code from ATCM. The inter-processor communication between the main A72 cores and these processors is achieved through shared memory and Mailboxes. The following firmware names are used by default for these cores, and can be overridden in a board dts file if needed: MAIN R5FSS0 Core0: am64-main-r5f0_0-fw (both in Single-CPU & Split modes) MAIN R5FSS0 Core1: am64-main-r5f0_1-fw (needed only in Split mode) MAIN R5FSS1 Core0: am64-main-r5f1_0-fw (both in Single-CPU & Split modes) MAIN R5FSS1 Core1: am64-main-r5f1_1-fw (needed only in Split mode) NOTE: A R5FSS cluster can be configured in "Single-CPU" mode by using a value of 2 for the "ti,cluster-mode" property. Value of 1 is not permitted. Signed-off-by: -
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Dan Murphy authored
TI-Feature: platform_base TI-Branch: platform-ti-linux-5.4.y * 'platform-ti-linux-5.4.y' of ssh://bitbucket.itg.ti.com/lcpdpublicdom/platform : arm64: dts: ti: k3-am64-main: Add GPIO DT nodes in main domain dt-bindings: gpio: Add compatible string for AM64 SoC arm64: dts: ti: k3-j7200: Update R5F nodes to use upstream properties arm64: dts: ti: k3-j721e: Update R5F nodes to use upstream properties arm64: dts: ti: k3-am65-mcu: Update R5F nodes to use upstream properties dt-bindings: remoteproc: k3-r5f: mark text binding document as obsolete remoteproc: k3_r5: add support for upstreamed DT property names dt-bindings: remoteproc: k3-r5f: Update bindings for J7200 SoCs dt-bindings: remoteproc: Add bindings for R5F subsystem on TI K3 SoCs dt-bindings: remoteproc: k3-dsp: mark text binding document as obsolete dt-bindings: remoteproc: k3-dsp: clean up whitespace errors Signed-off-by:
Dan Murphy <dmurphy@ti.com>
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Aswath Govindraju authored
Add device tree nodes for GPIO modules and interrupt controller in main domain Signed-off-by:Aswath Govindraju <a-govindraju@ti.com>
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Aswath Govindraju authored
Add compatible string for AM64 SoC in device tree binding of davinci GPIO modules as the same IP is used. Signed-off-by: -
git://git.ti.com/rpmsg/remoteprocSuman Anna authored
Pull in the updated remoteproc feature branch that enhances the K3 R5F remoteproc driver to add support for the revised R5FSS IP on AM64x SoCs. The merge only includes the dt-bindings and the driver changes, and the current vanilla integration branch cannot be used to verify the R5Fs on AM64x boards. The dts nodes will only be added on the RPMsg Domain Integration branch 'rpmsg-ti-linux-5.4.y-intg' where the required AM64x dtsi files are available. * 'rproc-linux-5.4.y' of git://git.ti.com/rpmsg/remoteproc : remoteproc: k3-r5: Extend support to R5F clusters on AM64x SoCs dt-bindings: remoteproc: k3-r5f: Update bindings for AM64x SoCs Signed-off-by:
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- Dec 10, 2020
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Suman Anna authored
The K3 AM64x SoC family has a revised R5F sub-system and contains a subset of the R5F clusters present on J721E SoCs. The K3 AM64x SoCs only have two dual-core Arm R5F clusters/subsystems with 2 R5F cores each present within the MAIN voltage domain (MAIN_R5FSS0 & MAIN_R5FSS1). The revised IP has the following distinct features: 1. The R5FSS IP supports a new "Single-CPU" mode instead of the LockStep mode on existing SoCs (AM65x, J721E or J7200). This mode is similar to LockStep-mode on J7200 SoCs in terms of TCM usage without the fault-tolerant safety feature provided by the LockStep mode. The Core1 TCMs are combined with the Core0 TCMs effectively doubling the amount of TCMs available in Single-CPU mode. The LockStep-mode on previous AM65x and J721E SoCs could only use the Core0 TCMs. These combined TCMs appear contiguous at the respective Core0 TCM addresses. The code though is executed only on a single CPU (on Core0), and as such, requires the halt signal to be programmed only for Core0, while the resets need to be managed for both the cores. 2. TCMs are auto-initialized during module power-up, and the behavior is programmable through a MMR bit. This feature is the same as on the recent J7200 SoCs. Extend the support to these clusters in the K3 R5F remoteproc driver using AM64x specific compatibles. New TI-SCI flags and a unique cluster mode are also needed for the cluster mode detection on these SoCs. The reset assert and deassert sequence of both the cores in Single-CPU mode is agnostic of the order, so the same LockStep reset and release sequences are re-used. The integration of these clusters is very much similar to existing SoCs otherwise. Signed-off-by: -
Suman Anna authored
The K3 AM64x SoCs have two dual-core Arm R5F clusters/subsystems, with 2 R5F cores each, both in the MAIN voltage domain. These clusters are a revised IP version compared to those present on J721E and J7200 SoCs, and supports a new "Single-CPU" mode instead of LockStep mode. Update the K3 R5F remoteproc bindings with the compatible info relevant to these R5F clusters/subsystems on K3 AM64x SoCs. Signed-off-by: -
LCPD Auto Merger authored
TI-Feature: rpmsg TI-Branch: rpmsg-ti-linux-5.4.y-intg * 'rpmsg-ti-linux-5.4.y-intg' of git://git.ti.com/rpmsg/rpmsg : arm64: dts: ti: k3-j7200: Update R5F nodes to use upstream properties arm64: dts: ti: k3-j721e: Update R5F nodes to use upstream properties arm64: dts: ti: k3-am65-mcu: Update R5F nodes to use upstream properties dt-bindings: remoteproc: k3-r5f: mark text binding document as obsolete remoteproc: k3_r5: add support for upstreamed DT property names dt-bindings: remoteproc: k3-r5f: Update bindings for J7200 SoCs dt-bindings: remoteproc: Add bindings for R5F subsystem on TI K3 SoCs dt-bindings: remoteproc: k3-dsp: mark text binding document as obsolete dt-bindings: remoteproc: k3-dsp: clean up whitespace errors Signed-off-by:
LCPD Auto Merger <lcpd_integration@list.ti.com>
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Suman Anna authored
Update all the MCU and MAIN R5F nodes on J7200 SoCs to use the upstream-friendly property-names compliant with the YAML-format binding document, Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml The following properties were substituted: lockstep-mode => ti,cluster-mode atcm-enable => ti,atcm-enable btcm-enable => ti,btcm-enable loczrama => ti,loczrama The driver continues to support legacy property names, but these will not be supported in a future LTS kernel. Any dynamic fdt fixups or overlays should migrate to use the newer property names. Signed-off-by: -
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git://git.ti.com/rpmsg/remoteprocSuman Anna authored
Pull in the updated remoteproc feature branch that includes couple of cleanups to the K3 DSP remoteproc bindings, and upstream compabitility updates to the K3 R5F remoteproc driver w.r.t bindings and properties. The changes are done in preparation for enhancing the K3 R5F remoteproc driver for AM64x SoCs using YAML bindings only. The following is the summary of changes: - Clean up some whitespace errors in the K3 DSP YAML binding and mark the current Text binding as obsolete - Backport YAML bindings for the K3 R5F remoteproc driver, the old text binding doc is retained for now, but marked obsolete - Enhance the K3 R5F remoteproc driver to be able to parse the new upstreamed properties: 'ti,cluster-mode', 'ti,atcm-enable', 'ti,btcm-enable' and 'ti,loczrama' - Switch the AM65x and J7200 R5F nodes from using legacy TI SDK property-names to the upstreamed property-names The dts node changes for J7200 will be added on the RPMsg Domain Integration branch 'rpmsg-ti-linux-5.4.y-intg' directly. * 'rproc-linux-5.4.y' of git://git.ti.com/rpmsg/remoteproc : arm64: dts: ti: k3-j721e: Update R5F nodes to use upstream properties arm64: dts: ti: k3-am65-mcu: Update R5F nodes to use upstream properties dt-bindings: remoteproc: k3-r5f: mark text binding document as obsolete remoteproc: k3_r5: add support for upstreamed DT property names dt-bindings: remoteproc: k3-r5f: Update bindings for J7200 SoCs dt-bindings: remoteproc: Add bindings for R5F subsystem on TI K3 SoCs dt-bindings: remoteproc: k3-dsp: mark text binding document as obsolete dt-bindings: remoteproc: k3-dsp: clean up whitespace errors Signed-off-by:
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Dan Murphy authored
TI-Feature: connectivity TI-Branch: connectivity-ti-linux-5.4.y * 'connectivity-ti-linux-5.4.y' of ssh://bitbucket.itg.ti.com/lcpdpublicdom/connectivity : (42 commits) arm64: dts: ti: k3-am642-evm: Add GPIO expander node arm64: dts: ti: k3-am64-main: Add I2C DT nodes in main domain dt-bindings: i2c: Add compatible string for AM64 SoC arm64: dts: ti: k3-am642-evm: Add USB support arm64: dts: ti: k3-am64-main: Add DT node for USB subsystem dt-bindings: usb: Add new compatible string for AM64 SoC arm64: dts: ti: k3-am642-evm: Add ethernet PHY and pinumux arm64: dts: ti: k3-am64-main: add main CPTS entry arm64: dts: ti: am64-main: Add CPSW DT node net: ethernet: ti: am65-cpsw: add support for am64x cpsw3g net: ti: am65-cpsw-nuss: Enable RX IRQ during ndo open if disabled. net: ethernet: ti: am65-cpsw-nuss: Support for transparent ASEL handling net: ethernet: ti: am65-cpsw-nuss: Use DMA device for DMA API net: ti: cpsw_ale: Add driver data for AM64 CPSW3g ti_config_fragments/connectivity.cfg: sync am65x cpsw kconfig to lkml net: ethernet: ti: am65-cpsw-nuss: sync kconfig to lkml net: ethernet: ti: ale: sync to lkml net: ethernet: ti: am65-cpsw: add multi port support in mac-only mode net: ethernet: ti: am65-cpsw: prepare xmit/rx path for multi-port devices in mac-only mode net: ethernet: ti: am65-cpsw: fix tx csum offload for multi mac mode ... Signed-off-by:
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Dan Murphy authored
Merge branch 'linux-5.4.y' of http://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable into ti-linux-5.4.y * 'linux-5.4.y' of http://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable: (315 commits) Linux 5.4.82 RDMA/i40iw: Address an mmap handler exploit in i40iw tracing: Remove WARN_ON in start_thread() Input: i8042 - add ByteSpeed touchpad to noloop table Input: xpad - support Ardwiino Controllers ALSA: usb-audio: US16x08: fix value count for level meters net/mlx5: Fix wrong address reclaim when command interface is down net/mlx5: DR, Proper handling of unsupported Connect-X6DX SW steering net/sched: act_mpls: ensure LSE is pullable before reading it net: openvswitch: ensure LSE is pullable before reading it net: skbuff: ensure LSE is pullable before decrementing the MPLS ttl net: mvpp2: Fix error return code in mvpp2_open() chelsio/chtls: fix a double free in chtls_setkey() vxlan: fix error return code in __vxlan_dev_create() net: pasemi: fix error retu...
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- Dec 09, 2020
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LCPD Auto Merger authored
TI-Feature: rpmsg TI-Branch: rpmsg-ti-linux-5.4.y-intg * 'rpmsg-ti-linux-5.4.y-intg' of git://git.ti.com/rpmsg/rpmsg : arm64: dts: ti: k3-am642-evm: Add IPC sub-mailbox nodes arm64: dts: ti: k3-am64-main: Add mailbox cluster nodes arm64: dts: ti: k3-am64-main: Add hwspinlock node mailbox: omap: Add support for K3 AM64x SoCs dt-bindings: mailbox: omap: Update binding for AM64x SoCs dt-bindings: hwlock: Update OMAP HwSpinlock binding for AM64x SoCs remoteproc: k3-dsp: Fix return value check in k3_dsp_rproc_of_get_memories() remoteproc: k3-r5: Fix error check on devm_remap_wc() remoteproc: ti_k3: fix -Wcast-function-type warning Signed-off-by:
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Add pinmux details and device tree node for GPIO expander attached to I2C1 in main domain. Signed-off-by:
Vignesh Raghavendra <vigneshr@ti.com>
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Add device tree nodes for I2C modules in main domain Signed-off-by:
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Add compatible string for AM64 SoC in device tree binding of OMAP I2C modules as the same IP is used. Signed-off-by:
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AM64 EVM board has a micro USB 2.0 AB connector and the USB0_VBUS is connected with a resistor divider in between. USB0_DRVVBUS pin is muxed between USB0_DRVVBUS and GPIO1_79 signals. Add the corresponding properties and set the pinmux mode for USB subsystem in the evm dts file. Signed-off-by:
Roger Quadros <rogerq@ti.com>
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Add DT node for the single USB subsystem in main dtsi file. Signed-off-by:
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Add compatible string in j721e-usb binding file as the same USB subsystem is present in AM64. Signed-off-by:
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Vignesh Raghavendra authored
Add ethernet PHY for port1. Also add MDIO and RGMII pinmux entries. Disable second port for now. Signed-off-by: -
Add DT node for the Main domain CPTS. Signed-off-by:
Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by:
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Vignesh Raghavendra authored
Add CPSW3g DT node with two external ports, MDIO and CPTS support. Signed-off-by:
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Vignesh Raghavendra authored
The TI AM64x SoCs Gigabit Ethernet Switch subsystem (CPSW3g NUSS) has three ports (2 ext. ports) and provides Ethernet packet communication for the device and can be configured as an Ethernet switch. This patch adds support for the corresponding CPSW3g version. Signed-off-by:
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Vignesh Raghavendra authored
It is possible that RX IRQ is disabled before interface is brought down due to NAPI, if so re-enable the IRQ during ndo open. Signed-off-by: -
Use the glue layer's functions to convert the dma_addr_t to and from CPPI5 address (with the ASEL bits), which should be used within the descriptors and data buffers. Signed-off-by:
Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by:
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For DMA API the DMA device should be used as cpsw does not accesses to descriptors or data buffers in any ways. The DMA does. Also, drop dma_coerce_mask_and_coherent() setting on CPSW device, as it should be done by DMA driver which does data movement. This is required for adding AM64x CPSW3g support where DMA coherency supported per DMA channel. Signed-off-by:
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Vignesh Raghavendra authored
CPSW3g is similar to j721e-cpswxg except its ALE table size is 512 entries. Add entry for the same. Signed-off-by: -
Sync kconfig K3 AM65x options to LKML. Signed-off-by:
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Sync kconfig K3 AM65x options to LKML. Signed-off-by:
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Minor sync to LKML. Signed-off-by:
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commit 84b4aa49 upstream. This patch adds final multi-port support to TI AM65x CPSW driver path in preparation for adding support for multi-port devices, like Main CPSW0 on K3 J721E SoC or future CPSW3g on K3 AM64x SoC. - the separate netdev is created for every enabled external Port; - DMA channels are common/shared for all external Ports and the RX/TX NAPI and DMA processing assigned to first available netdev; - external Ports are configured in mac-only mode, which is similar to TI "dual-mac" mode for legacy TI CPSW - packets are sent to the Host port only in ingress and directly to the Port on egress. No packet switching between external ports happens. - every port supports the same features as current AM65x CPSW on external device. Signed-off-by:
Jakub Kicinski <kuba@kernel.org> Signed-off-by:
Jesse Brandeburg <jesse.brandeburg@intel.com>
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commit a9e60cf0 upstream. This patch adds multi-port support to TI AM65x CPSW driver xmit/rx path in preparation for adding support for multi-port devices, like Main CPSW0 on K3 J721E SoC or future CPSW3g on K3 AM64x SoC. Hence DMA channels are common/shared for all ext Ports and the RX/TX NAPI and DMA processing going to be assigned to first available netdev this patch: - ensures all RX descriptors fields are initialized; - adds synchronization for TX DMA push/pop operation (locking) as Networking core locks are not enough any more; - updates TX bql processing for every packet in am65_cpsw_nuss_tx_compl_packets() as every completed TX skb can have different ndev assigned (come from different netdevs). To avoid performance issues for existing one-port CPSW2g devices the above changes are done only for multi-port devices by splitting xmit path for one-port and multi-port devices. Signed-off-by:
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commit 97067aaf upstream. The current implementation uses .ndo_set_features() callback to track NETIF_F_HW_CSUM feature changes and update generic CPSW_P0_CONTROL_REG.RX_CHECKSUM_EN option accordingly. It's not going to work in case of multi-port devices as TX csum offload can be changed per netdev. On K3 CPSWxG devices TX csum offload enabled in the following way: - the CPSW_P0_CONTROL_REG.RX_CHECKSUM_EN option enables TX csum offload in generic and affects all TX DMA channels and packets; - corresponding fields in TX DMA descriptor have to be filed properly when upper layer wants to offload TX csum (skb->ip_summed == CHECKSUM_PARTIAL) and it's per-packet option. The Linux Network core is expected to never request TX csum offload if netdev NETIF_F_HW_CSUM feature is disabled, and, as result, TX DMA descriptors should not be modified, and per-packet TX csum offload will be disabled (or enabled) on per-netdev basis. Which, in turn, makes it safe to enable the CPSW_P0_CONTROL_REG.RX_CHECKSUM_EN option unconditionally. Hence, fix TX csum offload for multi-port devices by: - enabling the CPSW_P0_CONTROL_REG.RX_CHECKSUM_EN option in am65_cpsw_nuss_common_open() unconditionally - and removing .ndo_set_features() callback implementation, which was used only NETIF_F_HW_CSUM feature update purposes Signed-off-by:
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