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  1. Aug 04, 2022
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  11. Jul 10, 2022
    • Texas Instruments Auto Merger's avatar
      Merged TI feature connectivity into ti-linux-5.10.y · 68c5ef28
      Texas Instruments Auto Merger authored 
      TI-Feature: connectivity
TI-Branch: connectivity-ti-linux-5.10.y

* 'connectivity-ti-linux-5.10.y' of ssh://bitbucket.itg.ti.com/lcpdpublicdom/connectivity

:
  phy: cadence: Sierra: Add TI J721E specific PCIe multilink lane configuration
  net: ethernet: ti: am65-cpsw: Fix devlink port register sequence

Signed-off-by: default avatarTexas Instruments Auto Merger <lcpd_integration@list.ti.com>
      68c5ef28
    • Swapnil Jakhade's avatar
      phy: cadence: Sierra: Add TI J721E specific PCIe multilink lane configuration · 3992a0f1
      Swapnil Jakhade authored and Vignesh Raghavendra's avatar Vignesh Raghavendra committed 
      commit e72659b6 upstream.

This patch adds workaround for TI J721E errata i2183
(https://www.ti.com/lit/er/sprz455a/sprz455a.pdf

).
PCIe fails to link up if SERDES lanes not used by PCIe are assigned to
another protocol. For example, link training fails if lanes 2 and 3 are
assigned to another protocol while lanes 0 and 1 are used for PCIe to
form a two lane link. This failure is due to an incorrect tie-off on an
internal status signal indicating electrical idle.

Status signals going from SERDES to PCIe Controller are tied-off when a
lane is not assigned to PCIe. Signal indicating electrical idle is
incorrectly tied-off to a state that indicates non-idle. As a result,
PCIe sees unused lanes to be out of electrical idle and this causes
LTSSM to exit Detect.Quiet state without waiting for 12ms timeout to
occur. If a receiver is not detected on the first receiver detection
attempt in Detect.Active state, LTSSM goes back to Detect.Quiet and
again moves forward to Detect.Active state without waiting for 12ms as
required by PCIe base specification. Since wait time in Detect.Quiet is
skipped, multiple receiver detect operations are performed back-to-back
without allowing time for capacitance on the transmit lines to
discharge. This causes subsequent receiver detection to always fail even
if a receiver gets connected eventually.

The workaround only works for 1-lane PCIe configuration. This workaround
involves enabling receiver detect override by setting TX_RCVDET_OVRD_PREG_j
register of the lane running PCIe to 0x2. This causes SERDES to indicate
successful receiver detect when LTSSM is in Detect.Active state, whether a
receiver is actually present or not. If the receiver is present, LTSSM
proceeds to link up as expected. However if receiver is not present, LTSSM
will time out in Polling.Configuration substate since the expected training
sequence packets will not be received.

Signed-off-by: default avatarSwapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20220303055026.24899-1-sjakhade@cadence.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
      3992a0f1
    • Siddharth Vadapalli's avatar
      net: ethernet: ti: am65-cpsw: Fix devlink port register sequence · 3e8e73d1
      Siddharth Vadapalli authored and Vignesh Raghavendra's avatar Vignesh Raghavendra committed 
      Renaming interfaces using udevd depends on the interface being registered
before its netdev is registered. Otherwise, udevd reads an empty
phys_port_name value, resulting in the interface not being renamed.

Fix this by registering the interface before registering its netdev
by invoking am65_cpsw_nuss_register_devlink() before invoking
register_netdev() for the interface.

Move the function call to devlink_port_type_eth_set(), invoking it after
register_netdev() is invoked, to ensure that netlink notification for the
port state change is generated after the netdev is completely initialized.

Fixes: 4c3e6208

 ("net: ti: am65-cpsw-nuss: Add devlink support")
Signed-off-by: default avatarSiddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
      3e8e73d1
  13. Jul 07, 2022
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